The present invention relates to a semiconductor fabrication technology, and more specifically to a method of fabricating a gate electrode of a semiconductor device.
Generally, the gate electrodes of MOS transistors are composed of a polysilicon layer.
As the integration density of a semiconductor device is higher, the patterns of the semiconductor device including gate electrodes is reduced in sizes, and more specifically the pattern widths thereof are shrunk to 0.25 xcexcm. Accordingly, the doped polysilicon film typically used as a gate electrode has a high resistivity and thus the time delay caused by the gate electrode become longer. Thus, it is difficult that the doped polysilicon film is used in a high speed device. The higher the integration of semiconductor device is, the more serious such difficulty becomes.
A conventional technology to solve such a problem is that a polycide structure primarily composed of a tungsten silicide film is used as gate electrode. A polysilicon/metal structure is also paid attention to for the usage of gate electrode.
However, such polycide or polysilicon/metal structures have a problem in that the re-oxidation process performed for recovering the etch damage in a gate oxide and a substrate due to gate patterning is not easily implemented.
This is because an abnormal oxidation is made in the silicide film or metal film when they are exposed in oxidation process. The difficulty in re-oxidation process after gate patterning may prevent the polycide or polysilicon/metal structure from being used as gate electrode.
Accordingly, the object of the present invention is to provide a method for fabricating a gate electrode of a semiconductor device, which is capable of omitting such a re-oxidation process that may cause an abnormal oxidation.
To achieve the above object of the present invention, there is provided a method for fabricating a gate electrode in a semiconductor device, comprising the steps of: sequentially forming a gate insulating film, a polysilicon film and a metal element containing film on a semiconductor substrate; patterning the metal element containing film and the polysilicon film by selectively etching; and etching side parts of the patterned polysilicon film so that the polysilicon film does not exist on the damaged gate insulating film.
In preferred embodiments, the metal element containing film can be a silicide film or a metal film. The etching step of side parts of the patterned polysilicon film is performed by wet etching using an etchant mixed a substantially 0.5 wt %xcx9c29 wt %, preferably 29 wt % of NH4OHxc2x7H2O solution with a pure water in the ratio of 1:2xcx9c1:50, preferably 1:20, where this etching may be preferably performed at 65xc2x0 C.xcx9c80xc2x0 C.
The step of etching side parts of the patterned polysilicon film may be performed by wet etching using 0.5 wt %xcx9c10 wt %, preferably 2.35 wt % of TMAH(tetra-methyl-ammonium-hydroxide) solution at 65xc2x0 C.xcx9c70xc2x0 C.
According to another embodiment of the present invention, the step of etching side parts of the patterned polysilicon film is performed by dry etching using a mixed gas of 3xcx9c5 lpm ozone (O3) gas and 150xcx9c200 sccm HF gas at room temperature and atmosphere pressure.
The present invention also provide a method for fabricating a gate electrode of a semiconductor device, comprising the steps of: forming a gate oxide film on a semiconductor substrate; forming a polysilicon film on the gate oxide film; forming a silicide film on the polysilicon film; forming a photoresist pattern for gate electrode formation on the silicide film; etching the silicide film and the polysilicon film using the photoresist pattern as etch mask, so as to form a gate electrode; and etching sides of the gate electrode. Here, the silicide film is composed of at least one of WSix, TiSix, CoSix, MoSix.
In summary, the present invention omits a re-oxidation process by patterning a gate electrode and then performing a wet and dry etching process having a high selectivity of polysilicon film to an oxide film without separate etch mask pattern, in the gate electrode formation: of polysilicon/silicide structure or polysilicon/metal structure.